1. Field of the Invention
The present invention relates to a heterojunction organic semiconductor Field Effect Transistor (to be abbreviated as HJOSFET hereinafter, and the Field Effect Transistor is abbreviated as FET hereinafter) and manufacturing process thereof and, more particularly, to a HJOSFET with a gate insulation layer and manufacturing process thereof.
2. Description of the Related Art
In recent years, the research on organic semiconductor is exceptionally active. The performance of the organic FET is superior to that of the amorphous silicon thin film transistor (a-Si:H TFT). In particular, the mobility of some organic micro-molecule oligomers (e.g. Pentacene, Tetracene, etc.) is over 1 (square centimeter per volt per second) at room temperature. So, the organic FET is potential in such practical applications as flexural integrated circuit (to be abbreviated as IC hereinafter), active matrix display and so on. Generally, the conventional organic semiconductor material is of high resistance characteristic, and the conventional FET made of organic semiconductor works in the mode of accumulation type. In this mode, when the gate voltage is low, the output current of the FET is low, as is called off-state; when the gate voltage is high, the output current of the FET is high, as is called on-state. So this kind of device is suitable for often working in the mode of off-state. However, a kind of depletion mode device often working in on-state is also needed in practical applications to realize low power waste, steady performance and simple structure in the logic circuit. The China Invention Patent Application No. 02129458.5 disclosed a sandwich-typed organic field effect transistor and provided a process for manufacturing a new type of semiconductor by using two or more organic semiconductor materials. With this method, the overall properties of the organic field effect transistor can be improved effectively, especially, the FET""s threshold voltage can be decreased effectively. The present invention provides a process for manufacturing a new heterojunction semiconductor with two or more kinds of organic semiconductor materials. With this method, the device designed in the same structure as presented in Patent No. 02129458.5 can work in the depletion mode with low power waste, meanwhile, it can work in the mode of super inverse.
The objective of this invention is to provide a HJOSFET with an insulation layer of gate.
Another objective of the invention is to provide a process for manufacturing FET.
To achieve the objectives as mentioned above, according to one aspect of the invention, the present application provide a FET comprising: a substrate (1), a gate electrode (2) formed on the substrate (1), a gate insulation layer (3) formed on the substrate (1) and the gate electrode (2), a first semiconductor layer (4) formed on the gate insulation layer (3), a source/drain electrode (5) formed on the first semiconductor layer (4), and a second semiconductor layer (6) formed on the first semiconductor layer (4) and the source/drain electrode (5).
According to another aspect of the present invention, it provides a process for manufacturing the FET, comprising the following steps:
Step a. forming a gate electrode made of a conducting material on the substrate;
Step b. forming an insulation layer on the substrate and the gate electrode;
Step c. forming the first semiconductor layer on the insulation layer formed in Step b;
Step d. forming a source electrode and a drain electrode on the first semiconductor layer;
Step e. forming the second semiconductor layer on the source electrode, the drain electrode and the first semiconductor layer.
According to the present invention, the active semiconductor layer is made up of two or more kinds of materials. The present invention is characterized by that the active semiconductor layer contains a heterojunction. The built-in electric field of the heterojunction can keep the active layer""s channel of FET, which is made of organic semiconductor with high resistance, in on-state. Thus, the FET working in depletion mode is obtained.
According to one preferred embodiment, the semiconductor layer (4) and (6) are, respectively, comprised of one selected from the group consisting of CuPc, NiPc, ZnPc, CoPc, PtPc, H2Pc, TiOPc, VOPc, thiophen oligomer, polythiophene, naphthacene, pentacene, perylene, perylene-3,4,9,10-tetracarboxylic-3,4,9,10-dianhydride (hereinafter to be abbreviated as PTCDA), fullerene, F16CuPc, F16ZnPc, F16FePc and F16CoPc.
According to another preferred embodiment, the semiconductor layer (4) and (6) are, respectively, comprised of two or more selected from the group consisting of CuPc, NiPc, ZnPc, CoPc, PtPc, H2Pc, TiOPc, VOPc, thiophen oligomer, polythiophene, naphthacene, pentacene, perylene, PTCDA, fullerene, F16CuPc, F16ZnPc, F16FePc and F16CoPc.
Herein, xe2x80x9cPcxe2x80x9d represents xe2x80x9cphthalocyaninexe2x80x9d and xe2x80x9cNcxe2x80x9d represents xe2x80x9cNaphthocyaninexe2x80x9d.